16 Bit Comparator Using 4 Bit Comparators 1x726m

DIGITAL INTEGRATED CIRCUITS APPLICATIONS LAB

2018

EXPERIMENT 16 BIT COMPARATOR USING 4 BIT COMPARATORS 1

Objective Design a 16 bit comparator using 4 bit comparators

2

Aim Test the functioning of the 16 bit comparator kit which is designed using 4 bit comparators Board Design a) Design objectives: i. Use four 4 bit comparators ii. Implement 16 bit Comparator iii. Indicate the Comparator all the three outputs status using LEDs b) Components: Technology: There are two choices for selecting the components i) TTL ii) CMOS. Here TTL ICs are chosen for implementing. Designs will depend on the technology Requirement IC/Value Qnty Remark i. 4 Bit Comparator 74LS85 4Nos 4X4 Bit to 16 comparator ii. Driver for LEDs 74LS16 1 Each IC has 6 open Collector (No internal collector load) Inverter Drivers iii. LED --3 Output Pin 6: A>B Output Pin 4: A=B Output Pin 2: A
1

DESIGN & MANUAL: Dr. P. Sudhakara Rao [VMTW]

DIGITAL INTEGRATED CIRCUITS APPLICATIONS LAB c)

2018

Component Details i. 74LS85: 4 Bit Magnitude comparator

 Pin numbers are marked inside the chip diagram



Pin names are marked outside the chip diagram

 A0, A1, A3 are binary inputs correspond to Magnitude ‘A’ with A0 as LSB  B0, B1, B3 are binary inputs correspond to Magnitude ‘B’ with B0 as LSB  A > Bi Input to Comparator for cascading  A = Bi Input to Comparator for cascading  A < Bi Input to Comparator for cascading  A > Bo output from Comparator for cascading comparators and status indication  A = Bo output from Comparator for cascading comparators and status indication  A < Bo output from Comparator for cascading comparators and status indication  VCC .. Connected to5V  GND … Connected to circuit common point

a) There are two binary data ‘A’ and ‘B’, each of 16 bits. The data is grouped into 4 sets of 4 Bits each (AH, AM-H, AM-L, AL) and (BH, BM-H, BM-L, BL): H-MSD, M-L: LSD of Middle Digits, M-H: MSD Middle Digits and L: LSD b) Comparison is always done from MSD to LSD. c) If AH > BH then A>B output is set ‘1’, and AB output is set ‘1’, and A
DESIGN & MANUAL: Dr. P. Sudhakara Rao [VMTW]

DIGITAL INTEGRATED CIRCUITS APPLICATIONS LAB

2018

f) If AH = BH and AM-H = BM-H then process described in c) & d) is carried on A M-L and BM-L g) If AH = BH , AM-H = BM-H and AM-L = BM-L then process described in c) & d) is carried on AL and BL h) If AH = BH , AM-H = BM-H , AM-L = BM-L and AL = BL then A>B output is set ‘0’, ABi)= 0, (Ai Bo), (Ao
ii.

74LS16: HEX INVERTER WITH OPEN COLLECTOR

iii.

SIP Resistors Each of the terminals 2,3,4,5,6,7,8 and 9 is one end of a resistor. Pin 1 is a common to which the other end of all resistors is connected. The connection details shall be checked from the circuit diagram

3

DESIGN & MANUAL: Dr. P. Sudhakara Rao [VMTW]

DIGITAL INTEGRATED CIRCUITS APPLICATIONS LAB iv.

2018

2 Pin Connector and a plug used to short both pins

d) Design Basics: A. The design concept is very simple. The design shall have 32 inputs and 3 comparator status outputs corresponding A>B, A Bi)= 0, (Ai Bi), (Ai Bo), (Ao Bi), (Ai Bo), (Ao Bi), (Ai Bo), (Ao Bo), (Ao
e) Design: The design may be divided into 5 sections i) Input Connections to Comparators ii) Inter Connections between comparators iii) Connecting LEDs to Comparator outputs Details of Each of the Sections i) Input Connections to a comparator Any input will assume logic ‘0’or Logic ‘1’. When the 2 pin connector terminals are open, then input say, A0 (Pin 10) will be Logic ‘0’. When the connector terminals are short circuited (by putting shorting link), A0 (Pin 10) will be at Logic ‘1’. 10 12

VCC

13 15 9

2 3 4 5 6 7 8 9

11 14

1

4

R8 100E

1

A0

A

A1

A=BO

A2

A>BO

7 6 5

A3 B0

7485

B1

A

B2

A=BI

B3

A>BI

2 3 4

DESIGN & MANUAL: Dr. P. Sudhakara Rao [VMTW]

DIGITAL INTEGRATED CIRCUITS APPLICATIONS LAB ii)

2018

Cascading connections using comparator inputs and Outputs It may be seen that the comparator used for comparing MSD data cascading inputs are connected as follows. A>B is connected to GND A
A0

A

12

A1

A=BO

13

A2

A>BO

15

7 6 5

A3

7485 [Next MSD]

9

B0

11 14

1

B1

A

B2

A=BI

B3

A>BI

2 3 4

And MSD comparator cascading outputs are connected as follows. A>Bo output is connected to A> Bi input A>Bo output is connected to A> Bi input A=Bo output is connected to A= Bi input

U7 10

A0 A

12

A1 A=BO

13

A2 A>BO

15

7 6 5

A3

9

B0

11 14 1

10 12 13 15 9 11 14 1

1 14 11 9 15 13 12 10

7485 [MSD]

B1

A

B2

A=BI

B3

A>BI

A0 A BI

2 3

VCC

4

2 3 4

A3

For all other sections the cascading is done as follows. (Ai > Bi) input of LSD is connected to MSD (Ao > Bo) output (Ai < Bi) input of LSD is connected to MSD (Ao < Bo) output (Ai = Bi) input of LSD is connected to MSD (Ao = Bo) output

B0 B1

7485

A>BO

B2

A=BO

B3

A

B3

A>BI

B2

A=BI

B1 B0

A

5 6 7

4 3 2

7485

A3 A>BO A2 A=BO A1 A

5 6 7

A0

iii) Connecting LEDs to Comparator outputs The output bit status is indicated using LED and hence 3 bits are indicated by means of 3 LEDs. Let us assume that when bit is = 0, then LED is OFF and when the bit is ‘1’, the LED is ON. Considering that the used LED driver is a NOT gate, the following circuit helps controlling the LED as above. A>B1 COMPARATOR OUTPUT

1

2 7416

Status 7416 output 0 1 1 0 5

LED status OFF ON

220E

VCC

Remark No current flows Assuming the drop across the diode (LED) is

DESIGN & MANUAL: Dr. P. Sudhakara Rao [VMTW]

DIGITAL INTEGRATED CIRCUITS APPLICATIONS LAB

2018

about 1V (Depend on the LED colour), and VCC = 5V, the Current through the LED is approximately = (5-1)/220 = 18mA. Hence to represent 3 status bits, 3 circuits are required. Each status output is connected to a driver-inverter (74LS16).

1 14 11 9 15 13 12 10

B3

A>BI

B2

A=BI

B1

A

B0

U8 7485

4 3 2 5 7416

A3

5

A>BO A2 A1

220E

U7B

6

A=BO

R10

A>B

6

3 7416

4

1

2

VCC

R9

A=B

220E

7

A
R8

A

220E

7416

f)

Circuit Diagram U2

A8 A9 A10 A11

10 12 13 15

B8 B9 B10 B11

14 1

A BO

A4 A5 A6 A7

7 6 5

A3 B0

7485

B1

A

B2

A=BI

B3

A>BI

B4 B5 B6 B7

2 3 4

10 12 13 15 9 11 14 1

A0 A BI

2 3 4

A3 B0 B1

VCC 7485 U3

A>BO

B2

A=BO

B3

A

5 6 R7 220E

7

2 3 4 5 6 7 8 9

VCC

2 3 4 5 6 7 8 9

VCC

9 11

A0

R2 100E

A>B

R6 220E

A=B

R5 220E

A

R3 100E 1

1

B12 B13 B14 B15

9 11 14 1

A>BO

6 5

A3 B0 B1 B2 B3

7485 A BI

A3 A2 A1 A0

2 3

VCC

4

1 14 11 9 15 13 12 10

B3

A>BI

B2

A=BI

B1

A

B0

U4 7485

A3 A>BO A2 A=BO A1 A

4

2

A=BO A2

B3 B2 B1 B0

7

U5C 7416

U5B 7416

U5A 7416 1

15

A
4

13

A0

3

12

6

10

5

U1

A12 A13 A14 A15

3 2

5 6 7

A0

2 3 4 5 6 7 8 9

VCC

2 3 4 5 6 7 8 9

1

VCC R1 100E

100E R4 1

g) Operating Procedure: The photograph of Kit’s front plate is shown here. On to the left 16 2-pin connectors are placed into 4 groups. First top 4 connectors represent (B11-15), Next 4 connectors represent (A11-15). The next 4 connectors represent (B8-12)and Next 4 connectors 6

DESIGN & MANUAL: Dr. P. Sudhakara Rao [VMTW]

DIGITAL INTEGRATED CIRCUITS APPLICATIONS LAB

2018

represent (A8-11). The pattern continue till all the 32 bits are represented. When a connector is open, then the respective input is ‘0’. When connector pins are shorted using short link, then the respective input is ‘1’.

h) Conclusions: The design explained above is not unique. The design depends on the chosen comparator and its functional pins. Even when CMOS Ics are employed, 74LS16 can still be employed to drive the LEDs as the 74LS16 inputs are compatible with both TTL and CMOS. The current limiting resistors’ value depends on the LED colour. The resistor value so chosen may vary and lower the value higher the brightnessand vice versa. However higher the current will reduce the LED life. Student may explore alternate design of interfacing the encoder output sets to LEDs, instead of using MUX. Student shall study implementing the same with 74885, an 8 bit comparator instead of 7485. i)

Viva Questions:

7

DESIGN & MANUAL: Dr. P. Sudhakara Rao [VMTW]