Analog Lab Manual 401h1p

ELECTRONICS & COMMUNICATION DEPARTMENT

ANALOG CIRCUIT LAB-1 List of Experiment 1] To study the static input characteristics of Common Emitter transistor. 2] To study the static output characteristics of Common Emitter transistor. 3] To study the static input characteristics of Common Base transistor. 4] To study the static output characteristics of Common Base transistor. 5] To plot the frequency response curve of double stage RC coupled CE transistor amplifier. 6] To plot the frequency response curve of double stage RC coupled CE transistor amplifier with voltage . 7] To study Wien Bridge Oscillator. 8] To determine the frequency of RC phase shift oscillator. 9] To measure the maximum signal handling capacity and the value of distortion in output of transistorized push pull amplifier. 10] To study the Darlington Pair amplifier using transistor. 11] To determine the factor and frequency of oscillation of Colpitt’s Oscillator 12] To determine the factor and frequency of oscillation of Clapp’s Oscillator

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EXPERIMENT NO.1 INPUT CHARACTERISTICS OF BJT IN CE CONFIGURATION

Aim: To study /plot the I/P characteristics of BJT in CE configuration Apparatus Required:(a)Ammeter 0-10µA (1no.) 0-25mA (1no.), Voltmeter 0-5V(1no.) & 0-15V (1no.) (b)Component values:Transistor, NPN BC148, PNP BC157,V1 =12V variable,Vcc=12V variable Circuit Diagram:-

Theory:Transistor has a three terminal (emitter base &collector) two junction. (Emitter junction & collector junction). When both the junctions are forward biased then it is called saturation region. When both the junction is reversed biased then it is called as cut-off region of transistor. If emitter junction is F.B. & collector junction is R.B. is called as Active region.

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Transistor can be used as an amplifier in any one of the configuration. Any of its terminals can be made common to input & output. This common terminal is usually grounded. The connection is then described in of common terminal. By observing the characteristics of the transistor that relates transistor currents and voltages behaviors of the transistor can be studied. This characteristics curve is known as static characteristics curve. Input characteristics:It relates the input current IB with input voltage VBE for a given constant output voltage VCE . In CE configuration, IB & VBE are input variables. The output variables are IC& VCE . Fig.1 shows the typical input characteristics for CE configuration. It is plotted between IB &VBE for different values of VCE. We can find out the dynamic input resistance (ri) of the transistor at a given values of VBE . It is defined as the reciprocal of the slope of curve at operating point (P). VBE ri = ---------- at VCE = CONSTANT IB The value of ri is typically 1kΩ , but can range from 800Ω to 3kΩ . Note:Input characteristics can be plotted for NPN transistor. Only connection of all voltage sources , milliammeters, &voltmeters will be reversed for the PNP transistor. Procedure:1. Make the circuit for CE configuration. 2. Connect all theVoltmeter&Ammeter. 3. Input characteristics:Keep VCE constant, change P1 note IB & VBE. Repeat the same procedure for different values of VCE. Plot the i/p curve between IB & V BE for different values of VCE. Find out dynamic input resistance from curve plotted. Precautions:1. Connect the circuit properly. 2. Loose connection must be avoided. 3. Take the reading carefully. 3

Observation Table:VCE= 2V VBE

VCE=5V IB

VBE

VCE=10V IB

VBE

IB

1) From input characteristics dynamics input resistance is given by, ∆VBE ri = ---------- at VCE =constant ∆IB Result:

Conclusion:By changing P1 (VBB) , forward biasing of emitter junction can be change. Also by changing P2 (VCC) reverse biasing of collector junction can be changed . So by changing VBB & VCC transistor can be operates in active , saturation or cut off region.

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Graph:-

Viva Question:1. 2. 3. 4. 5. 6. 7.

What is mean by saturation region of transistor? Define dc current gain? What is mean by cutoff region of transistor? State the range of β? What is meant by input resistance Ri? Why emitter is heavily dopped? Why it is called CE configuration?

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EXPERIMENT NO. 2 OUTPUT CHARACTERISTICS OF CE CONFIGURATION.

Aim:- To study /plot the O/P characteristics of BJT in CE configuration. Apparatus Required:(a)Ammeter 0-10µA(1no.) 0-25mA(1no.), Voltmeter 0-5V(1no.) & 015V(1no.) (b)Component values:Transistor, NPN BC148,PNP BC157,V1 =12V variable,Vcc=12V variable Circuit Diagram:-

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Theory:Transistor has a three terminal (emitter base &collector) two junction (emitter junction & collector junction). When both the junctions are forward biased then it is called saturation region. When both the junction are reversed biased then it is called as cut-off region of transistor. If emitter junction is F.B. & collector junction is R.B. is called as Active region. Transistor can be used as an amplifier in any one of the configuration. Any of its terminals can be made common to input & output. This common terminal is usually grounded. The connection is then described in of common terminal. By observing the characteristics of the transistor that relates transistor currents and voltages behaviors of the transistor can be studied. This characteristics curve is known as static characteristics curve. Output Characteristics:The curve plotted between IC and VCE for given values of IB is called as output characteristics. We can find out the following. 1. Dynamic output resistance, ∆VCE ro = ---------- at IB = constant ∆ic 2. DC current gain, IC ßdc = ---------IB

at VCE = constant

3. AC current gain ∆iC ßac = ---------- at VCE = constant ∆iB

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Note:Output characteristics can be plotted for NPN transistor. Only connection of all voltage sources, millimeters, & voltmeters will be reversed for the PNP transistor. Procedure:1. Make the circuit for CE configuration. 2. Connect all theVoltmeter&Ammeter. 3. Output characteristics:a) Keep IB constant,(BY SETTING P1) change P2 note IC & VCE. b) Repeat the same procedure for different values of IB. c) Plot the o/p curve between IC & V CE for different values of IB. d) Find out dynamic output resistance, dc current gain and ac current gain as explained in theory section. Precautions:1. Connect the circuit properly. 2. Loose connection must be avoided. 3. Take the reading carefully. Observation Table:FOR IB = 0 VCE

IC

FOR IB = 2mA VCE

IC

FOR IB =5mA VCE

IC

Calculation: a) Dynamics output resistance is given by ∆VCE ro = ---------- at IB =constant ∆IC = -------8

b) From output characteristics = ------------------- Ω c) DC current gain, IC ßdc= ----------- at VCE = constant IB = ---------d) AC current gain, ∆iC ß = ---------- at VCE = constant ∆iB = ----------Result:-

Conclusion:By changing P1 (VBB) , forward biasing of emitter junction can be change. Also by changing P2 (VCC) reverse biasing of collector junction can be changed . So by changing VBB & VCC transistor can be operates in active , saturation or cut off region.

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Graph:

Viva Question:1. 2. 3. 4. 5. 6. 7.

Define transistor? What is mean by active region of transistor? Why it is called as CE configuration? What is meant by output resistance Ro? Define ac current gain βac? What is the function of Emitter in the junction transistor? Draw symbol of NPN transistor.

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EXPERIMENT NO.3 Input Characteristics in CB Configuration Aim: To study /plot the I/P characteristics of BJT in CB configuration Apparatus Required:(a) Ammeter 0-10µA (1no.) 0-25mA (1no.), Voltmeter 0-5V (1no.) & 0-15V (1no.) (b) Component values:Transistor, NPN BC148, PNP BC157,V1 =12V variable, Vcc=12V (Variable) Circuit Diagram:-

Theory:Transistor has a three terminal (emitter base &collector) two junction. (Emitter junction & collector junction) When both the junction is forward biased then it is called saturation region. When both the junction is reversed biased then it is called as cut-off region of transistor. If emitter junction is F.B. & collector junction is R.B. is called as Active region.

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Transistor can be used as an amplifier in any one of the configuration. Any of its terminals can be made common to input & output. This common terminal is usually grounded. The connection is then described in of common terminal. In this configuration emitter current IE is the input current &collector current IC is the output current. The input voltages applied between the emitter and base. Whereas output is taken out from the collector and base. Input characteristics:The input characteristics are plotted between emitter current IE and emitter base voltage VEB for constant value of VCB. I/P characteristics shows that if VEB is less cut in voltage or knee /threshold voltage then IE is negligibly small. After this as VEB increases its value is 0.3V for Ge transistor & about 0.5V for Si transistor. For a given operating point input or dynamic resistance is given by, ∆ VEB Ri = ----------∆ IE

at VCB = constant

It may be noted that input char is linear in the upper region but Non linear (i.e. curved) in the lower region. Therefore the A.C. input resistance (Dynamic resistance) depends on the location of the operating point selected along the curve. Its value in the linear region of the curve is about 50Ω Procedure:1) Make the circuit for CB configuration. Connect all the voltmeter & Ammeter. 2) Check the VCC and VEE voltages by using voltmeter. 3) It is plotted between VEB(x-axis) and IE (y-axis) for constant values of VCB 4)Keep VCB const. say at 2V vary the VEB by plot P1 and note the corresponding IE in steps 5) Repeat step (4) for different values of VCB say 5V, 10V, 12V etc. 6) Plot the graph between VEB(x-axis) and IE (y-axis) for VCB= -2V, 5V, 10V etc.

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7) Select a suitable operating point say point P , on the graph plotted having VCB=10V, draw a small incremental triangle ABC on static char the dynamic input resistance is given by Ri =

∆ VEB ----------∆ IE

at VCB=10V

Precautions:1. Connect the circuit properly. 2. Take the reading carefully. 3. Connection should be tight. Observation Table:VCB= 2V VEB

VCB=5V IE

VEB

VCB=10V IE

VEB

IE

Calculation: ∆ VEB Ri = --------------- at VCB=10V ∆ IE Result: - from this we calculated the input resistance of the transistor in CB configuration. Ri = ----------------------- Ω Conclusion:By changing (VEB), forward biasing of emitter junction can be change. Also by changing (VCC) reverse biasing of collector junction can

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be changed. So by changing VEB & VCC transistor can be operates in active, saturation or cut off region. Graph:

Viva Question:1. 2. 3. 4. 5. 6. 7.

Define α. Why is base made thin? Why it is called as CB configuration? What is mean by input resistance Ri? Define transistor. Define ICBO. What is the function of emitter in transistor function.

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EXPERIMENT NO.4 OUTPUT CHARACTERISTICS IN CB CONFIGURATION Aim: To study /plot the O/P characteristics of BJT in CB configuration Apparatus Required:(a)Ammeter 0-10µA (1no.) 0-25mA (1no.), Voltmeter 0-5V (1no.) & 0-15V (1no.) (b)Component values:Transistor, NPN BC148, PNP BC157, V1 =12V variable, Vcc=12V variable Circuit Diagram:-

Theory:Transistor has a three terminal (emitter base &collector) two junction. (Emitter junction & collector junction) When both the junctions are forward biased then it is called saturation region. When both the junction is reversed biased then it is called as cut-off region of transistor. If emitter junction is F.B. & collector junction is R.B. is called as Active region. Transistor can be used as an amplifier in any one of the configuration. Any of its terminals can be made common to input & output. This common terminal is usually grounded. The connection is then described in of common terminal In this configuration emitter current IE is the input current &collector current IC is the output current. The input voltages applied

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between the emitter and base. Whereas output is taken out from the collector and base. Output characteristics:The output characteristics is plotted between VCB (x-axis) and collector current IC(y-axis) for constant value of IE. In the active region, emitter to base junction JE is forward biased while collector to base junction is reverse biased. In active region curves are almost horizontal. This shows that O/P dynamic resistance Ro is very high. VCB Ro = --------- at IE = constant IC At given operating point, AC & DC current gain is given by a) DC current gain, αdc = IC/IE b) AC current gain, αac = ∆IC/∆IE with VCB constant Procedure:1) Make the circuit for CB configuration. Connect all the voltmeter & Ammeter. 2) Check the VCC and VEE voltages by using voltmeter. 3) It is plotted between VCB(x-axis) and IC (y-axis) for constant values of IE. 4) Keep IE= 0 by adjusting pot P1 vary the VCB voltage in regular steps by pot P2 and note the corresponding value of IC. Plot the graph between VCB & IC. 5) Now keep IE =5mA by using pot P1 again vary the VCB voltage in regular steps and note the corresponding values of IC. Plot the graph between VCB (x-axis) and IC (y-axis). 6) Repeat step 5 for different values of IE 7) Select a suitable operating point on the graph plotted. Draw a incremental triangle ABC see fig. find incremental (dynamic) O/P resistance. ∆VCB DB Ro = ---------- at IE = const. = ------------ = ------- Ω ∆IC CB 8) Find DC current gain at this point by αdc = IC/IE where IC and IE are the currents at the selected operating point 9) To determine αac, draw a vertical line through the operating point P. Therefore,

αac = ∆IC/∆IE

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Precautions:1. Connect the circuit properly. 2. Take the reading carefully. 3. Connect the voltmeter and ammeter carefully. 4. Also check the errors of voltmeter and ammeter. Observation Table:FOR IE = 0 -VCB

IC

FOR IE = 2mA -VCB

IC

FOR IE =5mA -VCB

IC

CALCULATION: ∆VCB Ro = -------------∆IC

at IE = Constant

CB = --------- = --------- Ω AB DC Current gain, αdc = IC/IE =-------AC Current gain, αac = ∆IC/∆IE = Result: The values of different parameters for CB are found to be, Ro = ------------- Ω

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αdc = ----------------αac = ---------------Conclusion:By changing (VEB), forward biasing of emitter junction can be change. Also by changing (VCC) reverse biasing of collector junction can be changed. So by changing VEB & VCC transistor can be operates in active, saturation or cut off region. Graph:

Viva Question:1. 2. 3. 4. 5. 6. 7.

Explain transistor as a switch? What is the value of α in CB configuration? What is mean by output resistance Ro? Which parameter is constant for output characteristic? State that why ICEO is greater than ICBO. Explain the term thermal runaway . State the difference between CB & CE configuration.

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EXPERIMENT NO.5 RC COUPLED DOUBLE STAGE CE TRANSISTOR AMLIFIER Aim:-To study the frequency response of RC coupled double stage CE transistor amplifier. Apparatus Required: Training module type:EE-22 with CRO , signal generator , patch chords and instructions manuals. Circuit Diagram:-

Theory:One of the most used circuits in the transistor applications is the common emitter audio amplifier. This circuit performs a variety of functions, is fairly easy to design and gives good performance. Stages are capacitance coupled for AC operation and DC stability. Class A biasing is the most often used, because it allows the output to follow the input. Fig shows the transistorized RC coupled amplifier. The emitter resistances are shunted by a by capacitor to cause a short circuit for AC. The alternating emitter current does not cause any drop across emitter resistance. So there is no in the circuit. 19

RC coupled amplifier is popularly used for the following reasons: 1. It is the stable in operation. 2. It may be design & constructed for a good frequency response. 3. It is comparatively inexpensive because both the load resistance & coupling capacitor are simple & cheap elements. Procedure:1. Draw the circuit diagram on the note book. Compare the circuit diagram drawn with that on the actual setup board and write down the values and no of the components neatly on the diagram. 2. With no input signal connected, measure the biasing conditions at emitters, collectors & bases of both the transistors, tabulate them and write down on the circuit diagram. 3. The gain of the amplifier is about 1000; therefore a potential divider attenuator is used as shown in fig. R2 V2 = V1 ------------------(R1+R2) R2 = V1 ------------- (since R1>>R2) R1 4. Connect points C and D using the patch chords and the points A and B using another patch chords. 5. Connect an audio oscillator at the input terminals and CRO at the output terminals and adjust a small and constant value of input voltage. Note down i/p and o/p voltage using CRO at different frequencies in the observation table. This is the amplified o/p without any . 6. Plot a graph between voltage gains and frequencies for without . Precautions:1. Connect the circuit properly. 2. Take the reading carefully. 3. Trace the all waveforms from the CRO carefully. 4. Loose connection must be avoided.

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Observation:1. Without arrangement Vi =___________ volts Sr.No

Vo(V)

Voltage gain (dB) A = 20log(Vo/Vi)

Frequency (KHz)

Voltage Gain (A)=Vo/Vin Result: From above formula we calculated the value of voltage gain  Without __________________ Conclusion:The frequency response curve between voltage gain & frequency without arrangement are drawn.

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Graph

Viva Question:1. What are the lower & upper cut off frequencies? 2. What is the need of by capacitor in circuit diagram? 3. Why we use coupling between two stages of an amplifier? 4. In an amplifier circuits intermediate stages are CE configured, why? 5. What is meant by multistage amplifier? 6. Give the formula for overall power gain for three stage amplifier. 7. Define Bandwidth.

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EXPERIMENT NO.6 RC COUPLED VOLTAGE AMPLIFIER Aim: To study the frequency response of RC coupled double stage CE transistor amplifier. Apparatus Required: Training module type:EE-22 with CRO , signal generator , patch chords and instructions manuals. Circuit Diagram:-

Theory:One of the most used circuits in the transistor applications is the common emitter audio amplifier. This circuit performs a variety of functions, is fairly easy to design and gives good performance. Stages are capacitance coupled for AC operation and DC stability. Class A biasing is the most often used, because it allows the output to follow the input. Fig shows the transistorized RC coupled amplifier. The emitter resistances are shunted by a by capacitor to cause a short circuit for AC. The alternating emitter current does not cause any drop across emitter resistance. So there is no in the circuit. If we remove the shunt

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capacitor then the AC voltage developed across the emitter resistance will be added negatively causing a negative . RC coupled amplifier is popularly used for the following reasons: 1. It is the stable in operation. 2. It may be design & constructed for a good frequency response. It is comparatively inexpensive because both the load resistance & coupling capacitor are simple & cheap elements Procedure:1. Draw the circuit diagram on the note book. Compare the circuit diagram drawn with that on the actual setup board and write down the values and no of the components neatly on the diagram. 2. With no input signal connected, measure the biasing conditions at emitters, collectors & bases of both the transistors, tabulate them and write down on the circuit diagram. 3. The gain of the amplifier is about 1000, therefore a potential divider attenuator is used as shown in fig. R2 V2 = V1 ----------(R1+R2)

4. 5.

6. 7. 8.

R2 = V1------ (since R1>>R2) R1 Connect points C and D using the patch chords and the points A and B using another patch chords. Connect an audio oscillator at the input terminals and CRO at the output terminals and adjust a small and constant value of input voltage. Note down i/p and o/p voltage using CRO at different frequencies in the observation table. This is the amplified o/p without any . In case of arrangement change the value of R11 to vary fraction. Now for obtaining negative current , disconnect points A and B and repeat step 5. An alternative method of obtaining is to connect point E at the output to input using the patch chords and repeat step 5. Plot a graph between voltage gains and frequencies for without and with arrangement.

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Precautions:1. Connect the circuit properly. 2. Take the reading carefully. 3. Trace the all waveforms from the CRO carefully Observation:1. without arrangement Vi =___________ volts S.No.

Vo(V)

Voltage gain (dB) A = 20log(Vo/Vi)

Frequency (KHz)

2. with arrangement Vi =___________ volts

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S.No.

Vo(V)

Voltage gain (dB) Afb = 20log(Vo/Vi)

Frequency (KHz)

Result: From this we calculated the value of voltage gain  without __________________  with _____________________ Conclusion:When negative is used the voltage gain is reduces but output waveforms improves and stability increases. When frequency response curve between voltage gain and frequency for and without arrangement are plotted the curve resemble as shown in fig. Viva Question:1. 2. 3. 4. 5. 6. 7.

What are the types of ? What is the need of by capacitor in circuit diagram? Why we use coupling between two stages of an amplifier? Define voltage gain. Differentiate between positive & negative . Give the advantages of negative . Why positive amplifier is used in oscillator.

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EXPERIMENT NO.7 WEIN BRIDGE OSCILLATOR Aim: To study the circuit of Wein Bridge Oscillator & measure the frequency of oscillation. Apparatus Required: (a) CRO, Digital multimeter, Patch cords. (b) Components Value: R1 = R4 = 10KΩ, C1A = C2A = 0.1.µ f, C1B = C2B = 0.22.µ f, R5 = 100KΩ,R6 = 10KΩ, R7 = 100KΩ, R8 = 10KΩ, R9 = 1KΩ. R10 = 1KΩ, R2 = 3KΩ, R3 = 6KΩ, C0 = 0.1.µ f, Q1 = Q2 = BC548 Circuit diagram:

Theory: Wien Bridge oscillator is sine wave AF oscillator. Fig. Shown on the front of the kit circuit diagram of the Wien - bridge oscillator. The circuit consist of two stage RC coupled amplifier, which provide an approximately 360 or 0 phase - shift between I/P & O/P signal. so the feed back network has no need to induce any additional phase shift. The network consists of R1 - C1, R4 C2 called as lead - lag network and R3 - R2 called a voltage divider. The lead - lag network provides a positive to the input of the first stage & the voltage divider provides the negative to the emitter of Q1 transistor which controls the gain of transistor Amplifier Q1. 27

The operation of Wien Bridge Oscillator is as follows: When the circuit is energized by switching on the supply a small random oscillations appearing at the base of Q1 transistor are amplified, at its collector. These oscillations are further amplified by the collector of Q2 transistor. Since the oscillations at the collector of Q2 transistor has been inverted twice, therefore these oscillations are in phase with the input signal. The part of the output signal is to the base of Q1 through a Wien bridge network. This is further amplified. The process continues, till sustained oscillations are produced finally it produces sine wave O/P, having frequency in Audio Range so it is also called as AF Oscillator. The frequency of oscillations for the wien - bridge oscillator is given by the relation. Fo  1 / 2 R1 R4 C1C 2

If R1=R4=R & C1=C2=C

Then

1 Fo = --------------2πRC

------------ (2)

and the ratio of the resistor R3 to R4 is given by R3 ------------ ≥ C

2

or R3 > 2R2

Thus a ratio of R3 to R4 greater than 2 will provide a sufficient gain for the circuit to oscillate at the desired frequency. The frequency of oscillation can be changed by varying the values of R1, R4 , C1 or C2. Procedure:

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1) Study the circuit provided on the front of the kit. 2) Connect Capacitors C1A & C2A in the Circuit. Note this values & determine its Theoretical frequency by using equation (1) Fo = ------ Hz. 3) Connect the CRO at O/P terminal. 4) Switch ON the power supply. 5) Observe & Note the practical frequency of oscillation compare it with theoretical value. 6) Now Connect Capacitors C1B & C2B in the Circuit & Repeat the above steps. 7) Draw the O/P on graph. Observations: R1 = ________________ KΩ,

R2 = __________________KΩ

C1A = _______________ µf ,

C1B = _________________ µf

C2A = _______________ µf ,

C2B = _________________ µf

R4 = ________________ KΩ,

R4 = __________________ KΩ

1)Theoritical Frequency of Oscillation:

Fo  1 / 2 R1 R4 C1C 2 = ---------Hz

As R1 = R4 = R & C = C1A = C2A,

Therefore, 2)

1 Fo = ------------ = ----------Hz. 2πRC

Practical Frequency of Oscillation 29

Fo = _________________ Hz. Result:As the Wien bridge transistor amplifier Q1 & Q2 produces oscillations which are in AF range. So the circuit used as Wien bridge oscillator. Conclusion: Theoretical & practical frequency of oscillation (Fo) for Wein bridge oscillator is nearly equal. Precautions: 1. Take the trace of all waveform from CRO screen carefully 2. No variation in value of resistant ad capacitance. 3. Connect the all connections carefully. Viva Question: 1. What is the oscillator? 2. Define the frequency of oscillation? 3. What is the advantage of wein bridge oscillator as compare to other oscillators? 4. Give the range of frequency in Wein bridge oscillator? 5. Give the difference between amplifier & oscillator. 6. Define Barkhausein criterion. 7. Where wein bridge oscillator is commonly used.

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EXPERIMENT NO.8 RC PHASE SHIFT OSCILLATOR Aim: To study the RC phase shift oscillator. Apparatus required: 1. CRO 2. Training module of RC phase shift oscillator. 3. Patch cords. Circuit diagram:

Theory: The basic phase shift oscillator, as the name implies, is a conventional amplifier ad a phase shifting RC network. It is typically used in fixed frequency applications. As in the conventional LC oscillator, the collector output signal must be shifted 180° to produce the required regenerative . The phase shift oscillator accomplishes this with a series of RC networks connected in the collector-to-base loop. In a purely capacitive circuit, current leads voltage by 90°. In a RC network the phase difference between current and voltage falls between 0 and 90°, because resistance affect the phase relationship. By carefully selecting the resistance and capacitive values, the amount f phase shift across an RC network can be controlled. It is easy to cascade identical networks. To obtain the 180° phase shifts requires filters that are even multiple of 180°. N this case 90°,60°, 45°, and 30° are all multiple of 180°.resistance does not vary with frequency, however the capacitor is frequency sensitive, since its reactance changes with frequency. As XC 31

changes, the phase shift of the RC network also varies. When three 60° phase –shift network are cascaded the combined phase shift is 180°. Each network contributes 60° to the total phase shift of 180°. The phase shift network comprised of R1C1, R2C2, and R3C3 is connected between the collector and base of Q1, provides the 180° phase shift that make the circuit regenerative. To compensate the losses use the high gain of transistor (30 and 50). The approximate frequency of oscillation can be determined using the formula Fo  1 / 2 6 RC

Stability can be improved by increasing the no of RC networks, there by reducing the phase shift across each network. Procedure: 1. 2. 3. 4. 5. 6. 7. 8.

Switch on the trainer and check the power supply to be +15V. Connect “A cannel” CRO terminal to the output of oscillator. Adjust 470K potentiometer (P1) to get 1 KHz sin wave. Connect “B cannel” CRO terminal to the path marked “A”. Observe the phase difference between output and input. At point ‘A’ the phase difference should be 60°. At point ‘B’ the phase difference is 120°. At point ‘C’ the phase difference is 180°.

Observation: Trace the all wave forms from the CRO a compare the all waveform with each others and observe the phase shift between output and input.

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Calculation: Fo  1 / 2 6 RC

=-----------Hz. Results: Frequency of oscillation (Fo) =-------------Hz. Phase of input signal -----------------------Phase of output signal----------------------Conclusion: The phase shift oscillator functions best at fixed frequencies, since any variation of resistance or capacitance upsets the phase shift. Precautions: 1. Connect the all connections carefully. 2. No variation in value of resistance and capacitance. 3.Take the trace of all waveform from CRO screen carefully.

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Viva Question: 1. In RC phase shift oscillator variation in R& C value what effect on the output signal phase shift? 2. What is the oscillator? 3. What happened if the number of RC network increases in RC phase shift network? 4. Give the types of an oscillator.

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5. What is meant by undamped oscillation? 6. How can an amplifier are converted into oscillator. 7. What is difference between signal generator & oscillator?

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EXPERIMENT NO.9 TRANSISTORISED PUSH PULL AMPLIFIER Aim: General study of push pull audio power amplifier. Apparatus required: 1. Training module of push pull amplifier type: EE-24 analog with its instruction manual and patch chords. 2. Audio signal generator. 3. Output power meter. 4. Distortion-factor meter. 5. CRO 6. 8Ω speaker. Circuit diagram:

Theory: The push pull connection is the most widely used in power amplifier. It has less distortion and much efficiency. The resistor R1, R2 & RE fix up the operating point; as in any other transistor amplifier. The out

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put transformer has center-tapped primary and it serves to match the load with the output impedance of transistors. The input transformer has a center-tap secondary. It provide input signal to the two transistors. These signals are equal in magnitude but opposite in phase. On applying the input signal, the collector current of one transistor is “pulled down”. Hence the name push pull amplifier. The out put voltage is proportional to net current (IC1-IC2) flowing through the primary of the output transformer. We may connect load resistor to measure the out put power. Procedure: 1. Find the transistor type numbers from the experimental board & also find the transistor are n-p-n or p-n-p. 2. Trace the circuit of the amplifier a write down the values of the components used. 3. Switch ON the instrument. Measure voltage VCE for both the transistor. For a matched pair of transistor, the voltage VCE for both should be the same. Measure voltage drops across RE gives the sum of the two emitter-currents. Half of this current will be approximately the collector current of each transistor. 4. Feed the AC signal at the input. Keep the frequency at 1 KHz (midband frequency). Connect the loudspeaker as a load resistor at the out put. If you hear a sound, the circuit is working. 5. Replace the loudspeaker with power meter. Select a typical value of the load impedance (say, 8Ω) in the power meter. Also connect the output to a CRO. See the wave shape of the output voltage on the CRO. Increase the input signal voltage tilt h output wave shape starts getting distorted. Note this input signal voltage. Now reduce the input signal to a value slightly below this voltage. 6. Change the impedance (in the power meter) in steps. For each value of impedance, not down the output power. Plot the graph between output power and load impedance. From this graph, find the impedance for which the output power is maximum. This is the value of the optimum load. Select load impedance (in the power meter) which is equal to or near the optimum load. See the output on the CRO. Increases the input 7. Signal till the wave shape just show distortion. Note the value of this input voltage. This gives the maximum signal handing capacity of the amplifier.

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8. Slightly increase the input voltage connects a distortion-factor meter at the output and measure the distortion. Observation: 1. Operating point: VCC=…………..V; VCE1=…………….V; VCE2=…………V VE=……………. mV; IC1=IC2= ½ (VE/RE) =…………….mV 2. Typical load connected: Input signal frequency = 1 KHz Maximum input signal giving undistorted output =………….. 3. Optimum load : Input signal =…………..mV Signal frequency =1 KHz S. No.

Load impedance(in Ω)

Out put power (in mW)

4. Maximum signal handling capacity: Selected value of optimum load =……………… Frequency of the input signal

=……………… 38

% distortion in output=……………..mV Results: 1. Optimum LOAD impedance =……………… 2. Maximum signal handling capacity =…………..mV 3. Distortion=……………………..% Conclusion:

Precautions: 1. Connect the circuit properly. 2. Trace the all waveforms from the CRO carefully. 3. Take the reading from Audio signal generator, Output power meter & Distortion-factor meter carefully. Viva Question: 1. What is the advantage of push-pull amplifier as compare to class-B amplifier? 2. What is the mean of power amplifier? 3. Which types of distortion are occurs in push-pull amplifier? 4. What is the function of the center tapped transformer in push-pull amplifier? 5. Give the type of power amplifier. 6. Why a step down transformer is used in output circuit of output transformer. 7. Why power amplifier is called large signal amplifier.

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EXPERIMENT NO.10 DARLINGTON PAIR AMPLIFIER CIRCUIT Aim: Experiment with Darlington pair amplifier. Apparatus required: 1. Training module of Darlington pair amplifier. 2. Voltmeter. 3. DC supply Circuit diagram:

Theory: DARLINGTON CIRCUIT: In the diagram shown with common-base configuration, for transistor T1, we have IC1 = α1iE1 and iB1 = iE1- iC1 = iE1(1-α1) For the transistor T2, iC2 = α2iB1= α2iE1(1-α1) And If Then

iCT = iC1 + iC2 = iE1(α1+α2-α1α2) α1 = α2 = 0.98 αeff = iCT / iE1 = (α1+α2-α1α2)= 0.9996 40

A value almost equal to 1. Also hfe = β = α/(1-α) = 0.9996/(1-0.9996) = 2499 If two common emitter stages are cascaded, the current amplification factor would be hfe2 = 2401. So a Darlington pair circuits gives a high current gain and also helps to eliminate a number of circuit component. fig

In fig the input impedance T2 is given by Rin = hie + (1+hfe) RL Where RL is the load in the emitter circuit. The impedance of transistor T2 will be Zi2 = hie2 + (1+hfe2)Zi1 Where Zi1 is the load in the emitter circuit of T2. In this way the input impedance is increased. Difference amplifier: Another effective method of improving performance is by the use of difference amplifier shown in fig.

the

41

Figure 3 & 4:

If the transistors and circuit components are completely matched, there will be complete cancellation of effects of supply voltages, etc. The

42

configuration will be very effective especially if the emitter circuit resistance is equal to, or larger than, the value of load resistance. However, the circuit gain for the common mode signal is much smaller than for the conventional circuit. Procedure: 1. The base terminal of TR1 and TR2 are grounded. The DC collector voltages VO1 and VO2 with respect to ground are measured so as t find the difference VO1-VO2. The operating points for the two devices are noted as well as current through RE. 2. VS1 adjusted to be –VS2 = 10mV at a single source frequency of 1 KHz; then VO1 and VO2 are measured and noted so as to calculate Ad. 3. VS1 is adjusted to be VS2 = 20m V at a single source frequency of 1 KHz ; the VO1 AND VO2 measured and noted so as t calculate AC. The value of CMRR can be computed from the measured values of Ad and AC.

Results:

Conclusion:

Precautions:1. Connect the circuit properly. 2. Check the connection before switch on the power supply. 4. Take the reading carefully. Viva Question:1. What is mean by Darlington pair? 2. Why we use Darlington pair? 3. Define the α and β? 43

4. What is the relation between α and β? 5. What are the advantages of Darlington amplifier? 6. Give application of Darlington amplifier.

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EXPERIMENT NO.11 COLPITT’S OSCILLATOR Aim: To determine the factor and frequency of oscillation of Colpitt’s Oscillator. Apparatus Required: Madras-83 Kit,connecting wires,multimeter ,CRO etc. Circuit Diagram:

45

Theory: The colpitt is essentially shunt-fed,so DC collector current does not through the choke.Since the colpitts is more stable,it is used in manysignal generator. Bias networks, eliminated for simplicity, are similar to other transistor oscillator.The tapped capacitor arrangement identifies the Colpitts oscillator.As with all LC oscillator ,frequency is determined by inductor L1 and the series combination of capacitors C1 &C2.Capacitor C3 couples AC collector voltage to the tank,while blocking DC. Sincethe oscillator is a common-emitter configuration,collector voltage is 1800 The arrangement of capacitor C1 &C2 in a voltage-divider network produces the desired 1800 phase shift across capacitor C1, resulting in regenerative or positive . FIG-1

Figure 2 shows the tank circuit with negative potential at the bottom plate of C2.This negative potential is felt across the entire tank, charging the top plate of C1 to a positive potential through inductor L1.The result is that the

46

voltage across C1 is phased shifted 1800, producing regenerative . Q1 is further forward biased and quickly saturates. With Q1 saturated, there is no voltage drop across RFC, because current is no longer changing as shown in below fig1.The flywheel effect of the tank then takes over (fig-3) as C1 &C2 act as one capacitor discharging through L1 & building up the magnetic field. Fig-2&fig-3

Fig.2

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Fig3 When the capacitors are completely discharged, the field collapses & charges the top plate of C1 negative , reverse biasing Q1.Q1 is driven into cutoff.When capacitor C1 is fully charged, it discharges through L1. Again a field is built up around L1 that subsequently collapses and charges C1 in the opposite direction(fig-4)

Fig.4. Transistor Q1 is now forward biased and conducts.Thus, energy lost in the tank is replaced .a similar action occurs each cycle as positive replenishes energy expanded.The series combination of C1 & C2 determines oscillator frequency. C1,the capacitor, controls the amount of . This is result of the series voltage-divider arrangement of C1 & C2.If the capacitances of C1 decreased the amount of is increased. This can be illustrated by reviewing the formula for capacitive reactance(Xc). Xc=1/2πFC A decrease in capacitances C, result in opposition(Xc).Therefore, a larger voltage is developed across this increased opposition.The factor is determined by the ratio of the capacitors. 48

Factor (B)=C2/C1 The factor for the Colpitt’s is typically 0.1 to 0.5, or 10 to 50%. Too much distorts the output waveform, as a transistor Q1 is saturated for long periods of time.A factor of less than 10% may not be sufficient to sustain the oscillation. Procedure: 1] Patch the circuit as shown in wiring diagram. 2] Switch on the trainer and measure the power supply to be +15. 3] Observe the output at the collector of transistor onCRO. 4].Vary the 1M Potentiometer and 10K Potentiometer to get a sine wave. 5]. Measure the frequency of the output with C1=0.1µF and C2=0.01µF. 6]. Disconnect C1 & C2 & select C1=0.01µF 7 C2=0.001µF and measure the output frequency. Precaution: 1. Connect the circuit properly. 2. Check the connection before switch on the power supply. 3. Take the reading carefully. Observation Table: Sr.No.

C1 (µF)

C2

1 2 3

0.1 (µF) 0.01 (µF) 0.001 (µF)

0.01(µF) 0.001(µF) (50-500)pF

Frequency (inKHz)

RESULT:

CONCLUSION 49

Viva-voce Question: 1] What is meant by tank circuit 2] Define Oscillator. 3] Give the application of colpitts oscillator 4] Define Factor. 5] What is meant by RFC.

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EXPERIMENT NO.12 CLAPP OSCILLATOR Aim: To construct clap oscillator and determine oscillator stability. Apparatus Required : Connecting wires, millimeters, CRO etc Circuit Diagram:

Theory: The colpitts is essentially shut-fed, so DC collector current doesn’t through the choke. Since the colpitts is more stable, it is used in many signal generators. (Fig 1)

51

Bias network eliminated for simplicity, are similar to other transistor oscillators. The tapped capacitor arrangement identifies the colpitts oscillator. As with all LC oscillators frequency is determined by inductor L1 and the series combination of capacitors C1 and C2. Capacitor C3 couples AC collector voltage to the tank, while blocking DC. Since the oscillator is a common emitter configuration, collector voltage is out of phase with base voltage. The arrangement of capacitors C1 and C2 in a voltage divider network produces the desired 1800 phase shift across capacitor C1, resulting in regenerative or positive . The factor, usually 0.1 to 0.5 is determined by the ratio of C1to C2. increases if the value of C1 is lowered. Although the combination of C1 and C2 determines oscillator frequency, C2 has most pronounced effect on frequency. The colpitts is shock-excited into oscillation much like the other oscillator. Initial forward bias is furnished by the bias network and Q1 52

begins to conduct. The DC collector current path is from emitter to collector, through the RFC, returning to the power supply. This initial surge of current causes a negative voltage drop across the RFC, since the change is rapid. Capacitor C3 couples this negative voltage to the lower plate of capacitor C2. For simplicity, the following discussion will cover only the AC current path in the tank circuit. Fig 2 shows the tank circuit with negative potential at the bottom plate of C2. This negative potential is felt across the entire tank, charging the top plate of Q1 to a positive potential through indicator L1. The end result is that the voltage across C1 is phase shifted 180o producing regenerative . Q1 is farther forward biased and quickly saturates. With Q1 saturated, there is no voltage drop across RFC, because current is no longer changing as shown in below fig1.The flywheel effect of the tank then takes over (fig-3) as C1 &C2 act as one capacitor discharging through L1 & building up the magnetic field. Fig-2&fig-3

Fig.2

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Fig.3

When the capacitors are completely discharged, the field collapses & charges the top plate of C1 negative , reverse biasing Q1.Q1 is driven into cutoff.When capacitor C1 is fully charged, it discharges through L1. Again a field is built up around L1 that subsequently collapses and charges C1 in the opposite direction(fig-4)

54

fig5

Circuit Description: The clapp oscillator shown in fig 5 is a variation of the colpitts oscillators. The only difference is the addition of variable capacitor C3. Capacitor C3 forms a series-resonant circuit with inductor L1 and allows capacitor tuning without effecting the ratio. C3 is small, in relation to C1 & C2 due to the relationship of capacitors in series and parallel circuit configuration,C3 effectively determines the oscillators frequency. 55

Transistor Q1 is now forward biased and conducts. Thus, energy lost in the tank is replaced .a similar action occurs each cycle as positive replenishes energy expanded. The series combination of C1 & C2 determines oscillator frequency C1, the capacitor, controls the amount of . This is result of the series voltage-divider arrangement of C1 & C2.If the capacitances of C1 decreased the amount of is increased. This can be illustrated by reviewing the formula for capacitive reactance(Xc). Xc=1/2πFC A decrease in capacitances C, result in opposition (Xc).Therefore, a larger voltage is developed across this increased opposition. The factor is determined by the ratio of the capacitors. Factor (B)=C2/C1 The factor for the Colpitts is typically 0.1 to 0.5, or 10 to 50%. Too much distorts the output waveform, as a transistor Q1 is saturated for long periods of time. A factor of less than 10% may not be sufficient

Procedure: 1] Patch the circuit as shown in wiring diagram. 2] Switch on the trainer and measure the power supply to be +9. 3] Observe the output at the collector of transistor on CRO. 4] Measure the frequency on CRO at about 80 KHz. 5] Compare the practical frequency with the theoretical frequency by given formula Fo  1 / 2 LC

RESULT:

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CONCLUSION:

Viva-voce Question: 1. What is oscillator? 2. What is the difference between clapp & colpitts oscillator? 3. Define capacitive reactance. 4. What is meant by sustain oscillation? 5. Give the advantage & disadvantage of clapp oscillator.

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