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pranavtendulkar .
embedded systems researcher
about 14 rue de cerisae 38400 St Martin d’Heres [email protected] Webpage
languages bilingual english/hindi native marathi french notions
programming C, C++, Bash, Java
personal details
Date of birth : 4th June 1982 Nationality : Indian
interests graph analysis, multi-core algorithms, parallel programming, mapping-scheduling algorithms, data-flow programming models, streaming applications
education Since 2010
PhD. Candidate in Computer Science Mapping and Scheduling on Manycore Processors
2010
Msc. in Embedded System Design Thesis on OpenMP on Multicore processor
2005
PG Diploma in Embedded System Design Project on Linux Device Drivers
2004
Bachelor of Engg. in Electronics and Telecomm. University of Pune Thesis on Pattern Generator and Tester based on PCI-driven FPGA.
Verimag, Grenoble,
ALaRI, University of Lugano, Switzerland CDAC Bangalore, India
experience Jun-Aug 12
Research Intern Technische Universiteit Eindhoven, The Netherlands Runtime Management and Efficient Task Migration on multicore processor
Sep 09-Jul 10 Research Intern FORTH-ICS, Heraklion, Greece Design and Implementation of OpenMP on SARC processor Architecture Jul - Sep 09 Research Intern USI,Lugano Design and Development of Molecular Dynamics Algorithms on GPU 2006 - 2008 Embedded Engineer Design, Development and Testing of Embedded Systems.
eInfochips, India
Tyco Electronics, India 2004 - 2005 Product Engineer Design and Development of Interconnects for Automotive Systems
awards and honors 2009
Scholarship from Leonardo Foundation at University of Lugano, Switzerland.
2008
eI Rocks Award for Outstanding Contribution in Consistently managing the Projects at the Client Sites in eInfochips.
2006
First rank at CDAC Bangalore for DESD Sept 2005-06 batch 83.67% Grade A.
2004
Motorola Gold Medal for being the Best Student of the Year in E&Tc and Computer Students at MIT, Pune.
publications
Optimal 2D Data Partitioning for DMA Transfers on MPSoCs Selma Saidi, Pranav Tendulkar, Oded Maler Digital System Design (DSD), 2012 15th Euromicro Conference, 2012
Optimizing explicit data transfers for data parallel applications on the cell architecture Selma Saidi, Pranav Tendulkar, Oded Maler ACM Transactions on Architecture and Code Optimization(TACO), 2012, New York, NY, USA
Symmetry Breaking for Multi-Criteria Mapping and Scheduling on Multicores Pranav Tendulkar, Peter Poplavko, Oded Maler Formal Modelling and Analysis of Timed Systems (FORMATS), 2013
A Case Study into Predictable and Composable MPSoC Reconfiguration Pranav Tendulkar, Sander Stuijk Reconfigurable Architectures Workshop, RAW 13 Proceedings, 2013
Fine-Grain OpenMP Runtime with Explicit Communication Hardware Primitives Pranav Tendulkar Proc. of the 2011 Conference on Design, Automation & Test in Europe (DATE), 2011, Grenoble,
summer internship Jul-Sep 09
Molecular Dynamics on CUDA Architecture USI, Lugano Design and development of Molecular Dynamics Algorithm on CUDA Architecture based Tesla GPU by NVIDIA.
Jun-Aug 12
Runtime Management and Task Migration on multicore processor Tu/E, Eindhoven Design and development of composable and predictable run-time management system, with efficient task migration.
industrial experience eInfochips, Pune, India
March 2006 - August 2008
Embedded Engineer Security System on SoC uControl Inc. Middleware and Device Driver Development, Renesas Bringup, Porting of Linux OS on hardware platform, Ethernet over USB Driver Development and Testing in RedBoot BootLoader Wireless USB on Intel Proprietary MPSoc Intel Inc. Firmware development affirming Wireless USB Specifications, Bug Fixing, Design of New Architecture for Firmware Signature generation of an Image Ripcode Inc. Algorithm Design for generation of unique 48-bit signature from an image, Study of impact of algorithm parameters on the Server and Database VOIP on Texas Instruments Proprietary MPSoc Texas Instruments Pre-Silicon MPSoC Bring-up, VxWorks kernel porting and Driver development, Silicon Bring-up, Gigabit Ethernet Switch driver, Peripheral Drivers like Character LCD, SPI, I2C, Keypad etc. TycoElectronics, Pune, India
July 2004 - July 2005
Product Engineer Interconnect System Design Design and Development of Electrical Interconnect Systems for Automobiles, Implementing design standards of Automobile Manufacturers.
other activities Received a LEGO MINDSTORMS NXT® robot for participation in You Make IT Smart Robotics programming competition by Microsoft, for a maze solving Robot programmed in Virtual Programming Language. Participated in Yantriki - Techfest at IIT Mumbai for robotics competition to develop a MicroMouse.
technical skills Dev. Tools
Intel MPSoC for Wireless USB, TI MPSoC for VOIP, Freescale IMX31, MIPS32, ATMEL, ARM 7, Microblaze GCC, Rose Compiler, LeCroy USB Tracer, Ellisys Wireless-USB Tracer
Languages
C, C++, Linux Shell Scripts, VHDL, Assembly, SystemC
Hw. Platforms
OS Protocols Other
Linux, VxWorks, RTLinux, RedBoot PCI, USB, Wireless USB, RS 232, Ethernet Clearcase, SVN
embedded systems researcher
about 14 rue de cerisae 38400 St Martin d’Heres [email protected] Webpage
languages bilingual english/hindi native marathi french notions
programming C, C++, Bash, Java
personal details
Date of birth : 4th June 1982 Nationality : Indian
interests graph analysis, multi-core algorithms, parallel programming, mapping-scheduling algorithms, data-flow programming models, streaming applications
education Since 2010
PhD. Candidate in Computer Science Mapping and Scheduling on Manycore Processors
2010
Msc. in Embedded System Design Thesis on OpenMP on Multicore processor
2005
PG Diploma in Embedded System Design Project on Linux Device Drivers
2004
Bachelor of Engg. in Electronics and Telecomm. University of Pune Thesis on Pattern Generator and Tester based on PCI-driven FPGA.
Verimag, Grenoble,
ALaRI, University of Lugano, Switzerland CDAC Bangalore, India
experience Jun-Aug 12
Research Intern Technische Universiteit Eindhoven, The Netherlands Runtime Management and Efficient Task Migration on multicore processor
Sep 09-Jul 10 Research Intern FORTH-ICS, Heraklion, Greece Design and Implementation of OpenMP on SARC processor Architecture Jul - Sep 09 Research Intern USI,Lugano Design and Development of Molecular Dynamics Algorithms on GPU 2006 - 2008 Embedded Engineer Design, Development and Testing of Embedded Systems.
eInfochips, India
Tyco Electronics, India 2004 - 2005 Product Engineer Design and Development of Interconnects for Automotive Systems
awards and honors 2009
Scholarship from Leonardo Foundation at University of Lugano, Switzerland.
2008
eI Rocks Award for Outstanding Contribution in Consistently managing the Projects at the Client Sites in eInfochips.
2006
First rank at CDAC Bangalore for DESD Sept 2005-06 batch 83.67% Grade A.
2004
Motorola Gold Medal for being the Best Student of the Year in E&Tc and Computer Students at MIT, Pune.
publications
Optimal 2D Data Partitioning for DMA Transfers on MPSoCs Selma Saidi, Pranav Tendulkar, Oded Maler Digital System Design (DSD), 2012 15th Euromicro Conference, 2012
Optimizing explicit data transfers for data parallel applications on the cell architecture Selma Saidi, Pranav Tendulkar, Oded Maler ACM Transactions on Architecture and Code Optimization(TACO), 2012, New York, NY, USA
Symmetry Breaking for Multi-Criteria Mapping and Scheduling on Multicores Pranav Tendulkar, Peter Poplavko, Oded Maler Formal Modelling and Analysis of Timed Systems (FORMATS), 2013
A Case Study into Predictable and Composable MPSoC Reconfiguration Pranav Tendulkar, Sander Stuijk Reconfigurable Architectures Workshop, RAW 13 Proceedings, 2013
Fine-Grain OpenMP Runtime with Explicit Communication Hardware Primitives Pranav Tendulkar Proc. of the 2011 Conference on Design, Automation & Test in Europe (DATE), 2011, Grenoble,
summer internship Jul-Sep 09
Molecular Dynamics on CUDA Architecture USI, Lugano Design and development of Molecular Dynamics Algorithm on CUDA Architecture based Tesla GPU by NVIDIA.
Jun-Aug 12
Runtime Management and Task Migration on multicore processor Tu/E, Eindhoven Design and development of composable and predictable run-time management system, with efficient task migration.
industrial experience eInfochips, Pune, India
March 2006 - August 2008
Embedded Engineer Security System on SoC uControl Inc. Middleware and Device Driver Development, Renesas Bringup, Porting of Linux OS on hardware platform, Ethernet over USB Driver Development and Testing in RedBoot BootLoader Wireless USB on Intel Proprietary MPSoc Intel Inc. Firmware development affirming Wireless USB Specifications, Bug Fixing, Design of New Architecture for Firmware Signature generation of an Image Ripcode Inc. Algorithm Design for generation of unique 48-bit signature from an image, Study of impact of algorithm parameters on the Server and Database VOIP on Texas Instruments Proprietary MPSoc Texas Instruments Pre-Silicon MPSoC Bring-up, VxWorks kernel porting and Driver development, Silicon Bring-up, Gigabit Ethernet Switch driver, Peripheral Drivers like Character LCD, SPI, I2C, Keypad etc. TycoElectronics, Pune, India
July 2004 - July 2005
Product Engineer Interconnect System Design Design and Development of Electrical Interconnect Systems for Automobiles, Implementing design standards of Automobile Manufacturers.
other activities Received a LEGO MINDSTORMS NXT® robot for participation in You Make IT Smart Robotics programming competition by Microsoft, for a maze solving Robot programmed in Virtual Programming Language. Participated in Yantriki - Techfest at IIT Mumbai for robotics competition to develop a MicroMouse.
technical skills Dev. Tools
Intel MPSoC for Wireless USB, TI MPSoC for VOIP, Freescale IMX31, MIPS32, ATMEL, ARM 7, Microblaze GCC, Rose Compiler, LeCroy USB Tracer, Ellisys Wireless-USB Tracer
Languages
C, C++, Linux Shell Scripts, VHDL, Assembly, SystemC
Hw. Platforms
OS Protocols Other
Linux, VxWorks, RTLinux, RedBoot PCI, USB, Wireless USB, RS 232, Ethernet Clearcase, SVN
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